1. Field of the Invention
The present invention relates generally to data encoding and transmission techniques for use in telecommunications equipment. More specially, the present invention relates to an improved encoding and decoding circuit for enabling data transmission without restriction on the quantity and sequence of logic "ones" and "zeros," such that all of the information carrying cabability of a communication channel can be effectively utilized. The circuit of the present invention provides, selectably, either B8ZS or B6ZS encoding and decoding depending upon whether a DS1/DS1C or a DS2 line interface is required.
2. Description of the Prior Art
The Integrated Services Digital Network (ISDN) in its implementation in the North American digital telecommunications transmission network requires a full or unconstrained clear channel capability for 64-kilobit per second (Kb/s) communication channels. One encoding technique known as Zero-Byte Time Slot Interchange (ZBTSI) is a well known technique for providing clear channel capability, also known as bit-sequence independence, over DS1 transmission carrier facilities within the North American telephone network. Other line codes used as standardized line codes for providing the 64K bit clear channel capability for DS1, DS1C and DS2 signal transmission are B8ZS and B6ZS line codes, where B8ZS is "bipolar with eight zeros substitution" and B6ZS in "bipolar with six zeros substitution. At present, the North American telephone network limits the number of consecutive logic "zeros" that can be transmitted because the existing bipolar line code does not transmit any pulses for a logic "zero." As a result, the transmission of long strings of logic "zeros" can cause telecommunications line haul equipment such as multiplexers and protection switches to lose timing accuracy or clock recovery altogether.
As is well known, a single PCM telecommunications channel, known as a "DSO" channel, operates at 64 kilobits per second (Kb/sec) in each direction of transmission to transmit and receive 8,000 8-bit samples per second of a desired telecommunication, be it voice or data. According to the Bell standard, individual two-way channels are multiplexed into higher speed channels for long distance transmission. As a particular example, 24 8-bit samples, one from each DSO channel, are arranged serially in a single transmission frame together with a single framing bit to form a 193-bit frame.
Transmission of successive 193-bit frames at a rate of 8,000 frames per second determines the bit rate of 1.544 Mb/sec. Set forth in the following table are some of the Bell standard digital transmission lines or hierarchical levels with their associated transmission rates and numbers of channels:
TABLE 1 ______________________________________ Number of Transmission Line Voice Channels Transmission Rate ______________________________________ DS0 1 64 Kb/sec. DS1 24 Approx. 1.5 Mb/sec. .sup. DS1C 48 Approx. 3 Mb/sec. DS2 96 Approx. 6 Mb/sec. DS3 672 Approx. 45 Mb/sec. ______________________________________
The standard for digital carrier multiplexers operating to multiplex digital DS1, DS1C and DS2 T carrier transmission lines into a DS3 transmission line is set forth and discussed in the Bell System Transmission Engineering Technical Reference entitled "Digital Multiplexes, Requirements and Objectives" by the Director, Exchange Systems Design, AT&T (July, 1982). Digital multiplexers which are connected into the Bell System pulse code modulated T carrier telecommunications network must conform with this standard.
In order to properly encode the highest analog frequency of a voice channel, the sampling rate has been established at 8000 samples per second. This sampling rate is also the frame rate for the DS1 signal. Each sample is encoded into an eight-bit word, which permits the dynamic range of the human voice to be mapped over 256 discrete steps in amplitude. With 8000 samples per second times 8 bits per sample, the result is 64 Kb/s for each of the individual DSO channels. It seems reasonable that only the all-zero byte need be restricted, which would offer the ratio 255/256 efficiency, or 99.6 percent of the 64 kb/s channel, as unconstrained information bits for channel users. Unfortunately, existing equipment is not nearly this efficient.
Analog voice signals with associated signaling are coded into the 64 Kb/s channels using a combination of robbed-bit signaling and zero code suppression to guarantee the presence of at least one logic "one" in each byte. For digital data channels, a different technique is employed to ensure that the proper ones density is maintained. During transmission of customer digital data, a designated control bit is forced to a logic "one" on a full-time basis. Since the sampling rate remains at 8000 samples per second and there are now only 7 bits per sample available to the channel users, the effective unconstrained information rate to the channel user reduces to 56 Kb/s.
All of the transmission equipment source/sink designs which do not provide for clear channel capability employ at least one of the aforementioned techniques, which reduce the available information bits in the 64 Kb/s channels.
This includes virtually all such equipment currently in use in the North American telecommunications network. With the advent of ISDN, some scheme of restoring user access to the full 64 Kb/s channel without restriction on the quantity and sequence of ones and zeros is required. The same requirement exists for all remaining ISDN primary-rate interfaces. The provisioning of clear channel capability requires that new source/sink devices such as PCM terminals allow unconstrained primary-rate digital signals to enter and leave the network intact, and also continue to maintain the minimum pulse density requirements toward line-haul elements. Line-haul elements include repeaters, multiplexers, and automatic protection switches. To this extent, the North American network is not operating with clear channel capability with any of the known prior art techniques currently operational. The clear channel capability function is actually a synthesized condition, converting the clear channel signal to a form which can be transported by the line-haul network elements, then back to the original signal at the far-end source/sink device.
In known prior art, several B8ZS decoders and encoders were implemented for the DS1 and DS1C signals and several B6ZS decoders and encoders were implemented for the DS2 signal. The present invention is a simplified circuit combining both B8ZS and B6ZS decoder and encoder circuits in a single circuit, and including rate control circuitry to selectably adjust the circuit for either B8ZS or B6ZS line code, depending upon the transmission requirements, whether DS1/DS1C or DS2, and with approximately a fifty percent reduction in the circuitry of the prior art approach.